1. Field of the Invention
The present invention relates generally to bus bars. More particularly the present invention relates to bus bars having reduced parasitic inductances and equal current path lengths.
2. Background of the Related Art
Bus bars are commonly used in conjunction with high power converter and inverter circuits; the bus bar is the physical embodiment of the transistor interconnections in a converter or inverter circuit. One type of converter circuit converts DC power to AC power, a second type converts AC power to DC power. The discussion herein will focus on converters which convert DC power to AC power. Bus bars are often used in combination with each other in order to form a bus bar system, for example to increase power or to have a three phase system or both.
A typical DC to AC converter circuit 10 is illustrated in FIG. 1. The circuit 10 uses DC power from a positive input 28 and a negative input 26 to generate AC power at an output 30. The power from the output 30 is used to drive an AC device, such as an AC motor.
Looking first at the structure of the circuit 10, the circuit 10 comprises a first transistor 11 and a second transistor 12. First transistor 11 further includes a first collector 14 and a first emitter 16. Second transistor 12 further includes a second collector 18 and a second emitter 20.
The circuit also comprises lumped inductance 21 (represented as being located between the positive input 28 and the first collector 14) lumped inductance 22 (represented as being located between the first emitter 16, the second collector 18, and the output 30) and lumped inductance 23 (represented as being located between the negative input 26 and the second emitter 20). Lumped inductances 21, 22 and 23 are not discrete components in the circuit. Rather, they are spread throughout the circuit and represent the inductances caused by the transistors 11 and 12, the inputs 26 and 28, and the output 30, and the connections therebetween.
Turning now to the operation of circuit 10, the flow of current through the circuit will be described. When the first transistor 11 is turned on, current flows from the positive input 28, through the lumped inductance 21, into the first collector 14, through the first emitter 16, through the lumped inductance 22, and through the output 30.
Hereinafter, negative current will be described as positive current flowing in the opposite direction. For example, negative input 26 will be described as having positive current exiting it rather than as having negative current entering it. With this in mind, the flow of current through the second transistor will now be described: When the second transistor 12 is turned on, current flows from the output 30, through the lumped inductance 22, into the second collector 18, through the second emitter 20, through the lumped inductance 23, and through the negative input 26.
The transistors 11 and 12 are switched in such a way so as to produce an AC current at the output 30. (Typically, transistor 11 will be turned off while transistor 12 is turned on.) As is well known, there are a variety of ways to switch the transistors (e.g., by varying the timing of the switching) to produce an AC output. The particular method used will depend on the application.
FIG. 1 illustrates a first problem faced by high power converter circuits; namely, the problem of (lumped) parasitic inductances. Parasitic inductances are present in the components and connections of every circuit, and are undesirable because they decrease the efficiency of the circuit. Efficiency is decreased because there is a buildup of energy in the parasitic inductances when current is flowing through the circuit, and a subsequent dissipation into heat of this energy when the current is shut off. In a DC circuit, this phenomena is represented by the following relationship: ##EQU1## where E is the energy buildup in the inductor;
L is the parasitic inductance; and PA1 I is the current flowing through the inductor. PA1 L is the parasitic inductance; PA1 di/dt is the change in current with respect to the change in time.
When the current through a switching transistor is shut off (i.e., during commutation), the energy E built up in the inductor dissipates into heat energy, and is therefore wasted.
Another reason why parasitic inductances are undesirable is that they cause undesirable transients. This phenomenon is represented by the following relationship: ##EQU2## where v is the magnitude of the voltage transient;
The transients occur as the transistors in the converter circuit are switched on and off (i.e., during commutation), causing sudden changes in the flow of current through the circuit. As is clear from equation (2), the size of the voltage transient is directly proportional to the size of the parasitic inductance.
Hence, equations (1) and (2) both illustrate the desirability of having low parasitic inductances in a converter circuit. Often, however, the parasitic inductances are quite large in a converter circuit. As is known, the magnitude of a parasitic inductance is related to the size and type of components in a circuit, and to the size and layout of the connections between the components in a circuit. In high power converter circuits, the components and connections are of increased size in order to handle the increased power. The result is an increase in the size of parasitic inductances. Therefore, in order to decrease power loss and voltage transients during commutation from one transistor to the other, it is desirable to provide a bus bar having reduced parasitic inductances.
The circuit 10 of FIG. 1 is of limited usefulness because singular transistors 11 and 12 are often not available at a rating high enough for the large currents that a particular application may demand. To increase the power rating (and therefore the current capacity) of a system, transistors will often be placed in parallel. A parallelled-transistor converter circuit 60 is illustrated in FIG. 2. As FIG. 2 illustrates, however, this configuration creates a second main problem faced by high power converter circuits; namely, the unequal current path lengths cause poor current sharing between the transistors.
We look first at the structure of the converter circuit 60 illustrated in FIG. 2. Circuit 60 comprises a first converter half 45 and a second converter half 58. First half 45 includes transistors 40, 42, and 44 which are in parallel with each other. Each of transistors 40, 42, and 44 are also in series with a resistor 46, 48, and 50, respectively. First half 45 is connected to a positive input 70 and an output 66. Second half 58 includes paralleled transistors 53, 55 and 57; each transistor being in series with a resistor 59, 61 and 63, respectively. Second half 58 is connected to a negative input 68 and the output 66.
We now consider the operation of circuit 60, and in particular consider two scenarios. In the first scenario, the resistors 46, 48, 50, 59, 61 and 63 are all set to zero. When transistors 40, 42, and 44 are turned on, current will enter at positive input 70, flow through the first half 45, and exit through the output 66.
It is important to note that current traveling through transistor 44 will travel a further distance than current traveling through transistor 40 (assuming that the way the circuit 60 is physically constructed bears relation to the way the schematic is drawn in FIG. 2). In other words, the current path lengths through the two transistors 40 and 44 are unequal.
A similar result is reached when current flows through second half 58. Hence, when transistors 53, 55 and 57 are turned on, current will enter at the output 66, flow through the second converter half 58, and exit through the negative input 68. Again, the current traveling through transistor 57 travels a further distance than the current traveling through transistor 53.
A shorter path through transistors 40 and 53 directly results in those paths having smaller impedances. Because of these smaller impedances (and the current sharing properties of impedances in parallel), more current will travel through transistors 40 and 53 than through transistors 44 and 57. This is undesirable because it causes transistors 40 and 53 to bear a disproportionate share of the load.
In the second operational scenario, resistors 46, 48, 50, 59, 61 and 63 all have non-zero values. The values of the resistors are calculated so as to force current sharing, i.e., by making the impedances of each of the current paths equal. For example, resistor 59 is somewhat larger than resistor 63 so that the respective impedances of the two paths are equal and therefore the current flowing through the two paths are equal. This is impractical, however, because it requires additional parts (thereby increasing the cost, complexity, and the amount of parasitic inductance in the circuit), and it requires careful matching between resistors 46, 48, 50, 59, 61, 63 and transistors 40, 42, 44, 53, 55 and 57.
FIG. 3 illustrates another effort to deal with the current sharing problem. In FIG. 3, a circuit 72 is comprised of transistors 74, 76, 78, 80, 82 and 84, which are arranged in a circle power in/out configuration. The collectors of the transistors are connected to a ring or can 88 and to each other at node 86. The current through each of the transistors 74, 76, 78, 80, 82 and 84 are equal since each of the respective "radii" are equal.
However, this configuration suffers the disadvantage that it is impractical and difficult to build. One reason the circle power in/out configuration is difficult to build is that high power transistors are physically larger than low power transistors. This makes them more awkward to work with, especially where the circuit layout is itself awkward.
A second reason the configuration is difficult to build is that converter circuits should be constructed so that the transistors operate at the same temperature. The benefit of having equal current path lengths (i.e., equal current sharing) in circuit 72 will be lost if the transistors are not operating at the same temperature. When the devices are operating at the same temperature, any dependence of impedance on temperature cancels out and the current sharing between the devices is not upset. On the other hand, when the devices are not operating at the same temperature, the dependence of impedance on temperature will cause some current paths to have different impedances and will cause current sharing problems. Hence, in all converter circuits, equal current sharing is promoted both by having equal current path lengths and by having the transistors operate at the same temperature. In the converter circuit 72 of FIG. 3, it is more difficult than usual to get the transistors to operate at the same temperature because of the circuit's awkward layout.